
軟件無線電-USRP-X310-Ettus
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軟件無線電 USRP X310產(chǎn)品概述
USRP X310是一個(gè)高性能、可擴(kuò)展的軟件無線電(SDR)平臺(tái),用于設(shè)計(jì)和部署下一代無線通信系統(tǒng)。硬件體系結(jié)構(gòu)結(jié)合了兩個(gè)擴(kuò)展帶寬子板槽覆蓋DC-6GHz高達(dá)160 MHz的基帶帶寬,多個(gè)高速接口選項(xiàng)(PCIe,雙10 GigE或雙1 GigE),和一個(gè)大容量用戶可編程Kintex-7 FPGA,方便進(jìn)行桌面方式或機(jī)架式半高1U方式使用。除了提供一流的硬件性能外,X310的開源軟件體系結(jié)構(gòu)還提供跨平臺(tái)的UHD驅(qū)動(dòng)程序支持,使其與大量受支持的開發(fā)框架、參考體系結(jié)構(gòu)和開源項(xiàng)目兼容。
Operating Systems
Linux Windows |
Development Frameworks
GNU Radio Xilinx Vivado 2015.2 Design Suite |
Turn-Key Applications
Amarisoft LTE 100 |
Table 1: Operating systems, development frameworks, and reference applications
高性能可編程FPGA
在USRP X310的內(nèi)部,XC7K410T FPGA提供了設(shè)備內(nèi)所有主要組件之間的高速連接,包括RF前端、Host接口和DDR3內(nèi)存。默認(rèn)FPGA的內(nèi)部UHD提供的核心為數(shù)字下變頻、上變頻、微調(diào)和其他DSP功能等基本功能塊,使其可以與其他使用UHD架構(gòu)的USRP設(shè)備互換。大容量的Kintex-7 FPGA為開發(fā)人員提供了額外的空間來引入自定義DSP模塊,并且與大量USRP支持的開發(fā)框架、參考體系結(jié)構(gòu)和開放源碼項(xiàng)目兼容。
USRP N210
USRP X300
USRP X310
FPGA
Spartan3 XC3SD3400A | Kintex 7-325T | Kintex 7 -410T |
Logic Cells
53k | 328k | 406k |
Memory
2,268 Kb | 16,020 Kb | 28,620 Kb |
Multipliers
126 | 840 | 1540 |
Clock Rate
100 MHz | 200 MHz | 200 MHz |
Streaming Bandwidth per Channel (16-bit)
25 MS/s | 200 MS/s | 200 MS/s |
Table 2: FPGA resource comparison
多種高速接口選項(xiàng)
USRP X310提供多種接口選項(xiàng)。在箱子附帶中,提供1GigE用來快速使用起來。對于擴(kuò)展帶寬和較低延遲的應(yīng)用,如PHY/MAC研究,PCIe x4為確定性操作提供了一種有效的總線。使用網(wǎng)絡(luò)記錄器或多個(gè)處理節(jié)點(diǎn)的應(yīng)用最好使用10GigE接口選項(xiàng)。
附加功能- GPSDO, GPIO, 1GB DDR3,同步
X310還包括許多其他的功能,這些功能有助于無線系統(tǒng)的開發(fā)。板載1GB DDR3通過FPGA參考設(shè)計(jì)靈活接入,以緩沖和數(shù)據(jù)存儲(chǔ)存儲(chǔ)器補(bǔ)充FPGA資源。一個(gè)可選的內(nèi)部GPSDO提供了一個(gè)高精度的頻率參考,當(dāng)同步到GPS系統(tǒng)時(shí),可以將全球時(shí)間對準(zhǔn)到50ns以內(nèi)。外部GPIO連接器允許用戶控制外部組件,如放大器和開關(guān),接受輸入,如事件觸發(fā)器,并觀察調(diào)試信號。USRP X310還包括一個(gè)內(nèi)部JTAG適配器,允許FPGA開發(fā)人員輕松加載和調(diào)試新的FPGA映像。
軟件無線電 USRP X310產(chǎn)品特征
Two wide-bandwidth RF daughterboard slots
Up to 160MHz bandwidth each (wideband versions of CBX, WBX, SBX)
Daughterboard selection covers DC to 6 GHz
Large customizable Xilinx Kintex-7 FPGA for high performance DSP (XC7K410T)
Multiple high-speed interfaces
PCIe Express (Desktop) -200 MS/s Full Duplex
ExpressCard (Laptop) -50 MS/s Full Duplex
Dual 1 Gigabit Ethernet -25 MS/s Full Duplex
Dual 10 Gigabit Ethernet -2x RX at 200 MSps per channel
Dual 10 Gigabit Ethernet - 4x RX at 80 MSps per channel
UHD architecture provides compatibility with
GNU Radio
C++/Python API
Amarisoft LTE 100
Other third-party software and frameworks
Flexible clocking architecture
Configurable sample rate
Optional GPS-disciplined OCXO
Coherent operation with OctoClock and OctoClock-G
Compact and rugged half-wide 1U form factor for convenient desktop or rack mount usage
Digital I/O accessible on the front panel for custom control and interfacing from the FPGA
Two wide-bandwidth RF daughterboard slots
Up to 160MHz bandwidth each (wideband versions of CBX, WBX, SBX)
Daughterboard selection covers DC to 6 GHz
Large customizable Xilinx Kintex-7 FPGA for high performance DSP (XC7K410T)
Multiple high-speed interfaces
PCIe Express (Desktop) -200 MS/s Full Duplex
ExpressCard (Laptop) -50 MS/s Full Duplex
Dual 1 Gigabit Ethernet -25 MS/s Full Duplex
Dual 10 Gigabit Ethernet -2x RX at 200 MSps per channel
Dual 10 Gigabit Ethernet - 4x RX at 80 MSps per channel
UHD architecture provides compatibility with
GNU Radio
C++/Python API
Amarisoft LTE 100
Other third-party software and frameworks
Flexible clocking architecture
Configurable sample rate
Optional GPS-disciplined OCXO
Coherent operation with OctoClock and OctoClock-G
Compact and rugged half-wide 1U form factor for convenient desktop or rack mount usage
Digital I/O accessible on the front panel for custom control and interfacing from the FPGA
軟件無線電 USRP X310其他資源
USRP X300/X310 User Manual
USRP X300/X310 FAQ
USRP X300/X310 Configuration Guide
USRP System Bandwidth
USRP Hardware Driver (UHD) API Documentation
UHD Stable Binaries
UHD Source Code on Github
FPGA Resources
USRP X300/X310 User Manual
USRP X300/X310 FAQ
USRP X300/X310 Configuration Guide
USRP System Bandwidth
USRP Hardware Driver (UHD) API Documentation
UHD Stable Binaries
UHD Source Code on Github
FPGA Resources
Included in This Kit:
USRP X310
1 Gigabit Ethernet Cable
SFP Adapter for 1 GigE
Power Supply
USB 2.0 Cable for Internal JTAG Adapter
Four SMA-Bulkhead Cables
Getting Started Guide
USRP X310
1 Gigabit Ethernet Cable
SFP Adapter for 1 GigE
Power Supply
USB 2.0 Cable for Internal JTAG Adapter
Four SMA-Bulkhead Cables
Getting Started Guide
Recommended Daughterboards and Accessories:
120 MHz Daughterboards -WBX-120,SBX-120,CBX-120
160 MHz Daughterboard -UBX-160
80 MHz Daughterboard -TwinRX
Board-Mounted GPSDO (OCXO)
GPIO Expansion Kit
10 Gigabit,PCIe and Expresscard Interface Kits
1U Rackmount for USRP X300 and X310
120 MHz Daughterboards -WBX-120,SBX-120,CBX-120
160 MHz Daughterboard -UBX-160
80 MHz Daughterboard -TwinRX
Board-Mounted GPSDO (OCXO)
GPIO Expansion Kit
10 Gigabit,PCIe and Expresscard Interface Kits
1U Rackmount for USRP X300 and X310